POWER LOSS ANALYSIS MODEL OF A DC-DC BUCK-BOOST CONVERTER WITH AN INTERFACED THREE PHASE INVERTER FOR MEDIUM VOLTAGE APPLICATION

Crescent Onyebuchi Omeje

Department of Electrical/Electronic Engineering, University of Port Harcourt, Rivers State, Nigeria.

Keywords: Buck-boost converter, Duty cycle, Power losses, Efficiency, Voltage source inverter, Pulse width modulation, MATLAB simulation.

ARTICLE HISTORY: Received:5 June 2019 Revised:10 July 2019 Accepted:16 August 2019 Published:8 October 2019.

Contribution/ Originality: This study contributes in the existing literature by showing that at a reduced duty cycle and varied resistance values of a dc-dc buck boost converter, the Mosfet switching loss is increased whereas the Diode and Inductor conduction losses decrease correspondingly with the decrease in the duty cycle.

1. INTRODUCTION

DC to DC converters are extensively applied in power conversion processes for a renewable energy system such as the wind and solar energy applications, distributed generation systems (micro-grids) and dc motor drives [1]. Other applications include d.c power supply for office and telecommunication equipment as well as traction processes. Several measures have been adopted in developing new generations of ac-dc converters that can meet an improved power quality regulation at the same time offer better flexibilities that are required in renewable energy conversion systems [2-5]. Generally, a dc-dc converter can exist in different states which include the buck state, the boost state and the buck-boost state [6]. The multiplicities of some ac-dc converters are formed from the combination of one or two states of the dc-dc converter. A single-switch single stage buck converter was discussed in Juan [7]. This converter is attractive and has a simple controller that produces a high quality input current. The major drawback is that it operates at a high switching frequency of 25 KHz which exposes the switching devices to high voltage stress [8].  The three phase conventional ac-dc boost converter presented in Abdelsalam, et al. [9]; Wijeratne and Moschopoulos [10] has wide electrical applications. Its disadvantage is shown in the use of a boost converter after the diode stage which requires a high switching frequency and also the need for an intermittent pre-charging of the dc capacitor. This topology also has a poor short-circuit protection which can be corrected by incorporating an external dc chopper to the dc-terminals  [11]. This paper therefore developed an analytical model for power losses that are inherent in buck-boost converter and ways of adjusting the converter parameters to minimize the magnitude of these losses. The converters parameter adjustments also maximize the performance efficiency of the buck-boost converter. A low frequency pulse-width modulated (LFPWM) inverter is interfaced with the buck-boost converter and this is been compared with a high frequency pulse-width modulated (HFPWM) inverter for harmonic reduction purposes.

2. BASIC BUCK-BOOST CONVERTER OPERATION

A buck-boost converter is frequently applied in the dc to dc power supply stage of most electrical design applications since the output voltage can be regulated to a higher or a lower value than the input voltage. The converter input is normally an unregulated dc voltage or current sources which can be derived from a d.c battery, a rectified a.c source, a photovoltaic panel, a hydrogen based fuel source and electromechanical dc generator [12]. The basic hard-switched buck-boost dc to dc converter has one main unidirectional active semiconductor switch, one major diode and one inductance which functions as a filter and as a current limiting passive element. The input and output capacitors (Ci and Co) primarily filter the d.c ripples on the input and output terminals. The basic buck-boost converter circuit is presented in Figure 1 and 2. The principle of operation under continuous current mode is usually considered within the intervals of switch (Sm) conduction sequence. During on-state conduction, the input voltage source is directly connected to the inductor (Lm). This results in the accumulation of inductor energy from the source and subsequent supply of energy to the load terminal through the capacitor (Co). Similarly, in the off-state conduction, the accumulated inductor energy is transferred from the inductor Lm to the capacitor Co and load resistance R.

Figure-1. Basic buck-boost converter circuit with rectifiers [5].

Figure-2. Basic buck-boost converter with a D.C voltage input [6].

2.1. Mathematical Model of a Buck-Boost Circuit

The power losses and the efficiency of the Buck-Boost Converter are achieved with the aid of the equivalent circuit diagram presented in Figure 3.

Figure-3. Buck-boost equivalent circuit with parasitic resistance and diode forward voltage [11].

The following power losses associated with the Buck-boost equivalent circuit were considered:

1. The MOSFET conduction loss from the rDS (On-resistance or drain-source resistance).
2. The high frequency switching loss.
3. The diode forward resistance (RF) loss.
4. The diode forward voltage loss.
5. The inductor conduction loss from (rL).
6. The power loss from the filter capacitor resistance.

The MOSFET rDS conduction loss is given by 23.

Figure-4. Three phase voltage source inverter circuit diagram [12].

Figure-5. Per cycle variation of low frequency switching/gating signals of three phase inverter [12].

3. THREE PHASE VOLTAGE SOURCE INVERTER MODEL

A voltage source inverter is an electrical device that converts a direct current (d.c) voltage to its equivalent alternating current (a.c) voltage [13-15]. The a.c voltage and frequency may be varying or constant in nature depending on the application. A voltage fed inverter always has a stiff dc voltage source at the input terminal. This implies that its Thevenin impedance at every time interval is ideally zero. The d.c voltage is usually obtained from a battery source, fuel cell or photovoltaic cell [16-18]. Voltage-fed inverters are used extensively in major electrical applications such as uninterruptible power supplies (UPS), induction heating, active harmonic filters, static var compensators and flexible alternating current transmission systems devices (FACTS-DEVICES) [19-23]. The three phase voltage source inverter circuit diagram is presented in Figure 4. The inverter switching control systems are considered in terms of low frequency and high frequency carrier modulation. The low frequency pulse width modulation pattern per cycle angular spacing is shown in Figure 5. 

The high frequency switching signals is accomplished by comparing a phase disposition carrier signals with a modulating or a reference signal. The high frequency carrier signal is generated with the aid of the Simulink ramp block diagram in accordance with Equation 38.

tr1 represents the triangular or carrier waves for the inverter switching signal, x represents the amplitude of the respective triangular or carrier waveforms and fc  represents the switching frequency of the inverter power switches. The modulating signal of the voltage source inverter is represented in Equation 39.

The basic algorithm for the switching signal is achieved with Equation 40.

The overall circuit diagram for the DC-DC Buck-Boost converter with an interfaced Inverter circuit diagram is shown in Figure 6.

Figure-6. A DC-DC buck-boost with an interfaced inverter circuit diagram [13].

4. SIMULATION RESULTS AND DISCUSSION

The simulation results for the DC-DC Buck-Boost converter were realized with the parameter shown in Table 1 and 2. The simulation was done at a duty cycle values of 0.25, 0.5 and 0.75 respectively. In Figure 7 it is observed that at an input voltage of 100V, the converter produced a voltage of -33.33V at a duty cycle of D = 0.25. This entails a Bucking operation which is in conformity with Equation 10 since Vs < Vo when D < 0.5. In Figure 8 at a duty cycle value of D = 0.5, the input voltage Vs = 100V. This obviously corresponds to the magnitude of the output voltage Vo  = This value clearly agrees with Equation 10. The converter at this condition operates in its normal state with input voltage equal to the output voltage. Similarly, for a slight increase in the duty cycle value from 0.5 to 0.75, the output voltage increases geometrically in magnitude to a peak value of Vo  =  as shown in Figure 9. This operation at D > 0.5 or D = 0.75 indicates a Boosting operation of the converter. In Figure 10-13 the plots of various Losses associated with the Buck-Boost converter with respect to varied load resistance and duty cycle were presented. It is evidently shown in Figure 11-13 that when the duty cycle D is close to zero value, the conduction losses which include the diode conduction loss, inductor conduction loss and capacitive discharge are low in value. Conversely, the MOSFET switching loss peaks at a high value at low duty cycle since the input voltage is high at a fixed value of the output voltage. The conduction losses therefore increase rapidly as the duty cycle value is increased to 0.5 and above with a corresponding decrease in the MOSFET switching loss. The efficiency in line with the increase in the duty cycle from 0-0.5 increases and peaks at D = 0.5 as shown in Figure 14. At a value of D > 0.5, the efficiency decreases to zero when D = 1. In Figure 15 and 16 the waveforms for the Phase A output voltage and total harmonic distortion for the Low Frequency and High Frequency Pulse Width modulated inverter were presented. It is obviously shown from the spectral analysis that the fundamental value of the output voltage amplitude is 127.5V for the Low frequency PWM which is far less than the 154.5V obtained for the high frequency PWM. The %THD value of 30.94% contains more harmonics for the low frequency pulse width modulated inverter when compared with the 28.68% obtained for the high frequency pulse width modulated inverter. This implies that at a high switching frequency, low order harmonics below the carrier frequency are eliminated for a medium and high voltage application.

Table-1. DC-DC buck-boost simulation parameters [15].

Simulation parameters	Values
Input voltage	100V
Switching frequency	10KHZ
Inductance value	25Mh
Capacitance value	2200µF
Load resistance value	15Ω
Duty cycles	0.25, 0.50 and 0.75

Table-2. DC-DC buck-boost equivalent circuit parameters [15].

Simulation parameters	Values
Internal resistance of the MOSFET rDS	0.11Ω
Diode forward voltage VF	0.7V
Diode forward resistance	20mΩ
Capacitance value	2200µF
Load resistance values	5Ω  to 50Ω
Duty cycles	0 to 1.0

Figure-7.  Input and output voltage at 0.25 duty cycle.

Source: Simulation result.

Figure-8. Input and output voltage at 0.5 duty cycle.

Source: Simulation result.

Figure-9. Input and output voltage at 0.75 duty cycle.

Source: Simulation result.

Figure-10. MOSFET switching loss against duty cycle.

Source: Simulation result.

Figure-11. Diode conduction loss against duty cycle.

Source: Simulation result.

Figure-12. Inductor losses against duty cycle.

Source: Simulation result.

Figure-13. Power loss in capacitor against duty cycle.

Source: Simulation result.

Figure-14. Converters efficiency against duty cycle.

Source: Simulation result.

Figure-15. Phase A voltage and THD for LFPWM.

Source: Simulation result.

Figure-16. Phase A voltage and THD for HFPWM.

Source: Simulation result.

5. CONCLUSION

In this work, a thorough analysis of the mathematical modelling of a Buck-Boost dc-dc converter was made with respect to the converter losses at varied duty cycle and load resistance value. The simulation results achieved with MATLAB 7.14 showed that when the duty cycle D is close to zero, the conduction losses are low but the switching loss is usually high. Hence, the efficiency decreases to zero at a unity duty cycle as indicated in the simulation waveforms. The values obtained from the simulation waveforms for the Bucking State and Boosting state clearly showed a conformity in values when the converter parameters are substituted in the modeled equation for the Buck-Boost converter. Similarly, at a high frequency pulse width modulated inverter, low order harmonics below the carrier frequency are always eliminated for a medium and high voltage application.

Funding: This study received no specific financial support.

Competing Interests: The author declares that there are no conflicts of interests regarding the publication of this paper.

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